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SPU LLVM: Fixup for inline MFC transfers

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- Could previsouly segfault when src and dst were swapped. Just use unaligned instructions instead.
This commit is contained in:
Malcolm Jestadt
2022-05-29 11:36:43 -04:00
committed by Ivan
parent 5b0badc215
commit e9dfb3cb63
1 changed files with 1 additions and 1 deletions
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rpcs3/Emu/Cell/SPURecompiler.cpp
+1 -1
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@@ -6208,7 +6208,7 @@ public:
}
else
{
m_ir->CreateAlignedStore(m_ir->CreateLoad(m_ir->CreateBitCast(_src, vtype), false), m_ir->CreateBitCast(_dst, vtype), llvm::MaybeAlign{16});
m_ir->CreateAlignedStore(m_ir->CreateAlignedLoad(m_ir->CreateBitCast(_src, vtype), llvm::MaybeAlign{16}), m_ir->CreateBitCast(_dst, vtype), llvm::MaybeAlign{16});
}
}
}