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PPU LLVM: Use arm fmax/fmin for vmaxfp/vminfp

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- Arm fmax/fmin match altivec behaviour regarding nan behaviour
This commit is contained in:
Malcolm
2026-01-17 03:47:32 +00:00
committed by Elad
parent eaebd3426e
commit 760c35eec8
1 changed files with 8 additions and 0 deletions
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rpcs3/Emu/Cell/PPUTranslator.cpp
+8
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@@ -1327,7 +1327,11 @@ void PPUTranslator::VMADDFP(ppu_opcode_t op)
void PPUTranslator::VMAXFP(ppu_opcode_t op)
{
const auto [a, b] = get_vrs<f32[4]>(op.va, op.vb);
#ifdef ARCH_ARM64
set_vr(op.vd, vec_handle_result(fmax(a, b)));
#else
set_vr(op.vd, vec_handle_result(select(fcmp_ord(a < b) | fcmp_uno(b != b), b, a)));
#endif
}
void PPUTranslator::VMAXSB(ppu_opcode_t op)
@@ -1389,7 +1393,11 @@ void PPUTranslator::VMHRADDSHS(ppu_opcode_t op)
void PPUTranslator::VMINFP(ppu_opcode_t op)
{
const auto [a, b] = get_vrs<f32[4]>(op.va, op.vb);
#ifdef ARCH_ARM64
set_vr(op.vd, vec_handle_result(fmin(a, b)));
#else
set_vr(op.vd, vec_handle_result(select(fcmp_ord(a > b) | fcmp_uno(b != b), b, a)));
#endif
}
void PPUTranslator::VMINSB(ppu_opcode_t op)