SPU LLVM: Disable NaN rulling-out in Reduced Loop on ARM64

2026-07-06 19:36:54 +03:00
parent 4e2839f3d3
commit 21d5336753
1 changed files with 4 additions and 0 deletions
@@ -685,7 +685,11 @@ public:

 		bool is_gpr_not_NaN_hint(u32 i) const noexcept
 		{
+#ifdef ARCH_X64
 			return gpr_not_nans.test(i);
+#else
+			return false;
+#endif
 		}

 		origin_t get_reg(u32 reg_val) noexcept