SPU: add some AVX-512 variants

Utilities/sysinfo.cpp

@@ -19,6 +19,12 @@ bool utils::has_avx()
 	return g_value;
 }
 
+bool utils::has_avx2()
+{
+	static const bool g_value = get_cpuid(0, 0)[0] >= 0x7 && get_cpuid(7, 0)[1] & 0x20;
+	return g_value;
+}
+
 bool utils::has_rtm()
 {
 	// Check RTM and MPX extensions in order to filter out TSX on Haswell CPUs
@@ -26,6 +32,13 @@ bool utils::has_rtm()
 	return g_value;
 }
 
+bool utils::has_512()
+{
+	// Check AVX512F, AVX512CD, AVX512DQ, AVX512BW, AVX512VL extensions (Skylake-X level support)
+	static const bool g_value = get_cpuid(0, 0)[0] >= 0x7 && (get_cpuid(7, 0)[1] & 0xd0030000) == 0xd0030000;
+	return g_value;
+}
+
 std::string utils::get_system_info()
 {
 	std::string result;
@@ -68,7 +81,17 @@ std::string utils::get_system_info()
 
 	if (has_avx())
 	{
-		result += " | AVX+";
+		result += " | AVX";
+
+		if (has_avx2())
+		{
+			result += '+';
+		}
+
+		if (has_512())
+		{
+			result += '+';
+		}
 	}
 
 	if (has_rtm())

Utilities/sysinfo.h

@@ -8,11 +8,11 @@ namespace utils
 	inline std::array<u32, 4> get_cpuid(u32 func, u32 subfunc)
 	{
 		int regs[4];
-#ifdef _MSC_VER 
+#ifdef _MSC_VER
 		__cpuidex(regs, func, subfunc);
-#else 
+#else
 		__asm__ volatile("cpuid" : "=a" (regs[0]), "=b" (regs[1]), "=c" (regs[2]), "=d" (regs[3]) : "a" (func), "c" (subfunc));
-#endif 
+#endif
 		return {0u+regs[0], 0u+regs[1], 0u+regs[2], 0u+regs[3]};
 	}
 
@@ -20,8 +20,12 @@ namespace utils
 
 	bool has_avx();
 
+	bool has_avx2();
+
 	bool has_rtm();
 
+	bool has_512();
+
 	inline bool transaction_enter()
 	{
 		while (true)