Initial PPU LLVM implementation for aarch64
This commit is contained in:
kd-11
@@ -222,7 +222,7 @@ const auto ppu_gateway = build_function_asm<void(*)(ppu_thread*)>("ppu_gateway",
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#endif
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// Save native stack pointer for longjmp emulation
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c.mov(x86::qword_ptr(args[0], ::offset32(&ppu_thread::saved_native_sp)), x86::rsp);
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c.mov(x86::qword_ptr(args[0], ::offset32(&ppu_thread::hv_ctx, &rpcs3::hypervisor_context_t::regs)), x86::rsp);
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// Initialize args
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c.mov(x86::r13, x86::qword_ptr(reinterpret_cast<u64>(&vm::g_exec_addr)));
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@@ -291,37 +291,48 @@ const auto ppu_gateway = build_function_asm<void(*)(ppu_thread*)>("ppu_gateway",
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// and https://developer.arm.com/documentation/den0024/a/The-ABI-for-ARM-64-bit-Architecture/Register-use-in-the-AArch64-Procedure-Call-Standard/Parameters-in-general-purpose-registers
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// for AArch64 calling convention
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// Save sp for native longjmp emulation
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Label native_sp_offset = c.newLabel();
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c.ldr(a64::x10, arm::Mem(native_sp_offset));
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// sp not allowed to be used in load/stores directly
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c.mov(a64::x15, a64::sp);
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c.str(a64::x15, arm::Mem(args[0], a64::x10));
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// Push callee saved registers to the stack
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// Push callee saved registers to the hv context
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// Assume our LLVM compiled code is unsafe and can clobber our stack. GHC on aarch64 treats stack as scratch.
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// We also want to store the register context at a fixed place so we can read the hypervisor state from any lcoation.
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// We need to save x18-x30 = 13 x 8B each + 8 bytes for 16B alignment = 112B
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c.sub(a64::sp, a64::sp, Imm(112));
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c.stp(a64::x18, a64::x19, arm::Mem(a64::sp));
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c.stp(a64::x20, a64::x21, arm::Mem(a64::sp, 16));
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c.stp(a64::x22, a64::x23, arm::Mem(a64::sp, 32));
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c.stp(a64::x24, a64::x25, arm::Mem(a64::sp, 48));
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c.stp(a64::x26, a64::x27, arm::Mem(a64::sp, 64));
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c.stp(a64::x28, a64::x29, arm::Mem(a64::sp, 80));
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c.str(a64::x30, arm::Mem(a64::sp, 96));
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// Pre-context save
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// Layout:
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// pc, sp
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// x18, x19...x30
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// NOTE: Do not touch x19..x30 before saving the registers!
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const u64 hv_register_array_offset = ::offset32(&ppu_thread::hv_ctx, &rpcs3::hypervisor_context_t::regs);
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Label hv_ctx_pc = c.newLabel(); // Used to hold the far jump return address
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// Sanity
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ensure(hv_register_array_offset < 4096); // Imm10
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c.mov(a64::x15, args[0]);
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c.add(a64::x14, a64::x15, Imm(hv_register_array_offset)); // Per-thread context save
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c.adr(a64::x15, hv_ctx_pc); // x15 = pc
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c.mov(a64::x13, a64::sp); // x16 = sp
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c.stp(a64::x15, a64::x13, arm::Mem(a64::x14));
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c.stp(a64::x18, a64::x19, arm::Mem(a64::x14, 16));
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c.stp(a64::x20, a64::x21, arm::Mem(a64::x14, 32));
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c.stp(a64::x22, a64::x23, arm::Mem(a64::x14, 48));
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c.stp(a64::x24, a64::x25, arm::Mem(a64::x14, 64));
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c.stp(a64::x26, a64::x27, arm::Mem(a64::x14, 80));
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c.stp(a64::x28, a64::x29, arm::Mem(a64::x14, 96));
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c.str(a64::x30, arm::Mem(a64::x14, 112));
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// Load REG_Base - use absolute jump target to bypass rel jmp range limits
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Label exec_addr = c.newLabel();
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c.ldr(a64::x19, arm::Mem(exec_addr));
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c.mov(a64::x19, Imm(reinterpret_cast<u64>(&vm::g_exec_addr)));
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c.ldr(a64::x19, arm::Mem(a64::x19));
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// Load PPUThread struct base -> REG_Sp
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const arm::GpX ppu_t_base = a64::x20;
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c.mov(ppu_t_base, args[0]);
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// Load PC
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const arm::GpX pc = a64::x15;
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Label cia_offset = c.newLabel();
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const arm::GpX cia_addr_reg = a64::x11;
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// Load offset value
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c.ldr(cia_addr_reg, arm::Mem(cia_offset));
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c.mov(cia_addr_reg, Imm(static_cast<u64>(::offset32(&ppu_thread::cia))));
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// Load cia
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c.ldr(a64::w15, arm::Mem(ppu_t_base, cia_addr_reg));
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// Multiply by 2 to index into ptr table
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@@ -343,44 +354,45 @@ const auto ppu_gateway = build_function_asm<void(*)(ppu_thread*)>("ppu_gateway",
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c.lsr(call_target, call_target, Imm(16));
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// Load registers
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Label base_addr = c.newLabel();
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c.ldr(a64::x22, arm::Mem(base_addr));
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c.mov(a64::x22, Imm(reinterpret_cast<u64>(&vm::g_base_addr)));
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c.ldr(a64::x22, arm::Mem(a64::x22));
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Label gpr_addr_offset = c.newLabel();
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const arm::GpX gpr_addr_reg = a64::x9;
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c.ldr(gpr_addr_reg, arm::Mem(gpr_addr_offset));
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c.mov(gpr_addr_reg, Imm(static_cast<u64>(::offset32(&ppu_thread::gpr))));
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c.add(gpr_addr_reg, gpr_addr_reg, ppu_t_base);
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c.ldr(a64::x23, arm::Mem(gpr_addr_reg));
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c.ldr(a64::x24, arm::Mem(gpr_addr_reg, 8));
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c.ldr(a64::x25, arm::Mem(gpr_addr_reg, 16));
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// GHC frame for the guest. This seems dodgy but the only thing stored on stack is actually registers before making calls to C++ code.
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// Injected stack frames also work, but are not free and are completely unnecessary.
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c.sub(a64::sp, a64::sp, Imm(4096));
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// Execute LLE call
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c.blr(call_target);
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// Restore registers from the stack
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c.ldp(a64::x18, a64::x19, arm::Mem(a64::sp));
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c.ldp(a64::x20, a64::x21, arm::Mem(a64::sp, 16));
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c.ldp(a64::x22, a64::x23, arm::Mem(a64::sp, 32));
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c.ldp(a64::x24, a64::x25, arm::Mem(a64::sp, 48));
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c.ldp(a64::x26, a64::x27, arm::Mem(a64::sp, 64));
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c.ldp(a64::x28, a64::x29, arm::Mem(a64::sp, 80));
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c.ldr(a64::x30, arm::Mem(a64::sp, 96));
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// Restore stack ptr
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c.add(a64::sp, a64::sp, Imm(112));
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// Return
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c.ret(a64::x30);
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// Return address after far jump. Reset sp and start unwinding...
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c.bind(hv_ctx_pc);
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c.bind(exec_addr);
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c.embedUInt64(reinterpret_cast<u64>(&vm::g_exec_addr));
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c.bind(base_addr);
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c.embedUInt64(reinterpret_cast<u64>(&vm::g_base_addr));
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c.bind(cia_offset);
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c.embedUInt64(static_cast<u64>(::offset32(&ppu_thread::cia)));
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c.bind(gpr_addr_offset);
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c.embedUInt64(static_cast<u64>(::offset32(&ppu_thread::gpr)));
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c.bind(native_sp_offset);
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c.embedUInt64(static_cast<u64>(::offset32(&ppu_thread::saved_native_sp)));
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// Execution guard undo (unneded since we're going to hard-reset the SP)
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//c.add(a64::sp, a64::sp, Imm(4096));
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// We either got here through normal "ret" which keeps our x20 intact, or we jumped here and the escape reset our x20 reg
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// Either way, x20 contains our thread base and we forcefully reset the stack pointer
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c.add(a64::x14, a64::x20, Imm(hv_register_array_offset)); // Per-thread context save
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c.ldr(a64::x15, arm::Mem(a64::x14, 8));
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c.ldp(a64::x18, a64::x19, arm::Mem(a64::x14, 16));
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c.ldp(a64::x20, a64::x21, arm::Mem(a64::x14, 32));
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c.ldp(a64::x22, a64::x23, arm::Mem(a64::x14, 48));
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c.ldp(a64::x24, a64::x25, arm::Mem(a64::x14, 64));
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c.ldp(a64::x26, a64::x27, arm::Mem(a64::x14, 80));
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c.ldp(a64::x28, a64::x29, arm::Mem(a64::x14, 96));
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c.ldr(a64::x30, arm::Mem(a64::x14, 112));
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// Return
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c.mov(a64::sp, a64::x15);
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c.ret(a64::x30);
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#endif
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});
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@@ -390,11 +402,20 @@ const extern auto ppu_escape = build_function_asm<void(*)(ppu_thread*)>("ppu_esc
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#if defined(ARCH_X64)
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// Restore native stack pointer (longjmp emulation)
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c.mov(x86::rsp, x86::qword_ptr(args[0], ::offset32(&ppu_thread::saved_native_sp)));
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c.mov(x86::rsp, x86::qword_ptr(args[0], ::offset32(&ppu_thread::hv_ctx, &rpcs3::hypervisor_context_t::regs)));
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// Return to the return location
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c.sub(x86::rsp, 8);
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c.ret();
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#else
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// We really shouldn't be using this, but an implementation shoudln't hurt
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// Far jump return. Only clobbers x30.
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const arm::GpX ppu_t_base = a64::x20;
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const u64 hv_register_array_offset = ::offset32(&ppu_thread::hv_ctx, &rpcs3::hypervisor_context_t::regs);
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c.mov(ppu_t_base, args[0]);
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c.mov(a64::x30, Imm(hv_register_array_offset));
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c.ldr(a64::x30, arm::Mem(ppu_t_base, a64::x30));
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c.ret(a64::x30);
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#endif
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});
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@@ -2265,6 +2286,9 @@ void ppu_thread::exec_task()
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{
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if (g_cfg.core.ppu_decoder != ppu_decoder_type::_static)
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{
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// HVContext push to allow recursion. This happens with guest callback invocations.
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const auto old_hv_ctx = hv_ctx;
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while (true)
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{
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if (state) [[unlikely]]
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@@ -2276,6 +2300,8 @@ void ppu_thread::exec_task()
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ppu_gateway(this);
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}
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// HVContext pop
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hv_ctx = old_hv_ctx;
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return;
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}
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@@ -2314,6 +2340,8 @@ ppu_thread::ppu_thread(const ppu_thread_params& param, std::string_view name, u3
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{
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prio.raw().prio = _prio;
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memset(&hv_ctx, 0, sizeof(hv_ctx));
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gpr[1] = stack_addr + stack_size - ppu_stack_start_offset;
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gpr[13] = param.tls_addr;
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@@ -3502,7 +3530,7 @@ static bool ppu_store_reservation(ppu_thread& ppu, u32 addr, u64 reg_value)
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if (notify)
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{
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bool notified = false;
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bool notified = false;
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if (ppu.res_notify_time == (vm::reservation_acquire(notify) & -128))
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{
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@@ -5277,12 +5305,14 @@ static void ppu_initialize2(jit_compiler& jit, const ppu_module& module_part, co
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// Translate
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if (const auto func = translator.Translate(module_part.funcs[fi]))
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{
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#ifdef ARCH_X64 // TODO
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// Run optimization passes
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#if LLVM_VERSION_MAJOR < 17
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pm.run(*func);
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#else
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fpm.run(*func, fam);
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#endif
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#endif // ARCH_X64
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}
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else
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{
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@@ -5297,12 +5327,14 @@ static void ppu_initialize2(jit_compiler& jit, const ppu_module& module_part, co
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{
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if (const auto func = translator.GetSymbolResolver(whole_module))
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{
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#ifdef ARCH_X64 // TODO
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// Run optimization passes
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#if LLVM_VERSION_MAJOR < 17
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pm.run(*func);
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#else
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fpm.run(*func, fam);
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#endif
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#endif // ARCH_X64
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}
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else
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{
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